As semiconductor technologies evolve, three-dimensional integrated circuits emerge as an effective alternative to further reduce the physical size of a semiconductor chip. In a three-dimensional integrated circuit, active circuits are fabricated on different wafers and each wafer die is stacked on top of another wafer die using pick-and-place techniques. Much higher density can be achieved by employing vertical stacking of integrated circuits. Furthermore, three-dimensional integrated circuits can achieve smaller form factors, cost-effectiveness, increased performance and lower power consumption.
In the process of manufacturing three-dimensional integrated circuits, known good die (KGD) and known good stack (KGS) tests are often performed through various testing probe card at various stages during the manufacturing process. Probe cards are one type of test structure used to perform electrical tests. The probe card may be coupled between an automatic testing equipment board and a semiconductor die under test. The probe cards make contact to the semiconductor die through a plurality of probe contacts.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the various embodiments and are not necessarily drawn to scale.